Synthesizable VHDL design for FPGAs

This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was mature...

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Detalles Bibliográficos
Autores principales: Bezerra, Eduardo Augusto, Lettnin, Djones Vinicius
Lenguaje:eng
Publicado: Springer 2014
Materias:
Engineering
Acceso en línea:https://dx.doi.org/10.1007/978-3-319-02547-6
http://cds.cern.ch/record/1627058
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author Bezerra, Eduardo Augusto
Lettnin, Djones Vinicius
author_facet Bezerra, Eduardo Augusto
Lettnin, Djones Vinicius
author_sort Bezerra, Eduardo Augusto
collection CERN
description This book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.
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institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2014
publisher Springer
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spelling cern-16270582021-04-21T21:38:34Zdoi:10.1007/978-3-319-02547-6http://cds.cern.ch/record/1627058engBezerra, Eduardo AugustoLettnin, Djones ViniciusSynthesizable VHDL design for FPGAsEngineeringThis book provides a gradual description of very-high-speed integrated circuits hardware description language (VHDL), targeting the design of digital systems to be implemented in field-programmable gate array (FPGA) platforms. It is organized in a very didactic way. The adopted methodolgy was matured over 20 years of teaching experience in the subject. The examples in the book were planned targeting two FPGA platforms, one used widely around the world and the other one developed by a Brazilian company.Springeroai:cds.cern.ch:16270582014
spellingShingle Engineering
Bezerra, Eduardo Augusto
Lettnin, Djones Vinicius
Synthesizable VHDL design for FPGAs
title Synthesizable VHDL design for FPGAs
title_full Synthesizable VHDL design for FPGAs
title_fullStr Synthesizable VHDL design for FPGAs
title_full_unstemmed Synthesizable VHDL design for FPGAs
title_short Synthesizable VHDL design for FPGAs
title_sort synthesizable vhdl design for fpgas
topic Engineering
url https://dx.doi.org/10.1007/978-3-319-02547-6
http://cds.cern.ch/record/1627058
work_keys_str_mv AT bezerraeduardoaugusto synthesizablevhdldesignforfpgas
AT lettnindjonesvinicius synthesizablevhdldesignforfpgas

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