NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs

NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34~Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide...

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Autores principales: Ammendola, R., Biagioni, A., Frezza, O., Lamanna, G., Lonardo, A., Lo Cicero, F., Paolucci, P.S., Pantaleo, F., Rossetti, D., Simula, F., Sozzi, M., Tosoratto, L., Vicini, P.
Lenguaje:eng
Publicado: 2013
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/9/02/C02023
http://cds.cern.ch/record/1629759
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author Ammendola, R.
Biagioni, A.
Frezza, O.
Lamanna, G.
Lonardo, A.
Lo Cicero, F.
Paolucci, P.S.
Pantaleo, F.
Rossetti, D.
Simula, F.
Sozzi, M.
Tosoratto, L.
Vicini, P.
author_facet Ammendola, R.
Biagioni, A.
Frezza, O.
Lamanna, G.
Lonardo, A.
Lo Cicero, F.
Paolucci, P.S.
Pantaleo, F.
Rossetti, D.
Simula, F.
Sozzi, M.
Tosoratto, L.
Vicini, P.
author_sort Ammendola, R.
collection CERN
description NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34~Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.
id cern-1629759
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2013
record_format invenio
spelling cern-16297592022-08-10T20:53:40Zdoi:10.1088/1748-0221/9/02/C02023http://cds.cern.ch/record/1629759engAmmendola, R.Biagioni, A.Frezza, O.Lamanna, G.Lonardo, A.Lo Cicero, F.Paolucci, P.S.Pantaleo, F.Rossetti, D.Simula, F.Sozzi, M.Tosoratto, L.Vicini, P.NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUsDetectors and Experimental TechniquesNaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34~Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.NaNet is an FPGA-based PCIe X8 Gen2 NIC supporting 1/10 GbE links and the custom 34 Gbps APElink channel. The design has GPUDirect RDMA capabilities and features a network stack protocol offloading module, making it suitable for building low-latency, real-time GPU-based computing systems. We provide a detailed description of the NaNet hardware modular architecture. Benchmarks for latency and bandwidth for GbE and APElink channels are presented, followed by a performance analysis on the case study of the GPU-based low level trigger for the RICH detector in the NA62 CERN experiment, using either the NaNet GbE and APElink channels. Finally, we give an outline of project future activities.arXiv:1311.4007oai:cds.cern.ch:16297592013-11-15
spellingShingle Detectors and Experimental Techniques
Ammendola, R.
Biagioni, A.
Frezza, O.
Lamanna, G.
Lonardo, A.
Lo Cicero, F.
Paolucci, P.S.
Pantaleo, F.
Rossetti, D.
Simula, F.
Sozzi, M.
Tosoratto, L.
Vicini, P.
NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title_full NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title_fullStr NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title_full_unstemmed NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title_short NaNet: a flexible and configurable low-latency NIC for real-time trigger systems based on GPUs
title_sort nanet: a flexible and configurable low-latency nic for real-time trigger systems based on gpus
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1088/1748-0221/9/02/C02023
http://cds.cern.ch/record/1629759
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