A prototype hybrid pixel detector ASIC for the CLIC experiment

A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64x64 square pixels with 25 μm...

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Detalles Bibliográficos
Autores principales: Valerio, P, Alozy, J, Arfaoui, S, Ballabriga, R, Benoit, M, Bonacini, S, Campbell, M, Dannheim, D, De Gaspari, M, Felici, D, Kulis, S, Llopart, X, Nascetti, A, Poikela, T, Wong, W S
Lenguaje:eng
Publicado: 2014
Materias:
Particle Physics - Experiment
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/9/01/C01012
http://cds.cern.ch/record/1635171
Descripción
Sumario:A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64x64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measure- ment of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.

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