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A prototype hybrid pixel detector ASIC for the CLIC experiment

A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64x64 square pixels with 25 μm...

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Detalles Bibliográficos
Autores principales: Valerio, P, Alozy, J, Arfaoui, S, Ballabriga, R, Benoit, M, Bonacini, S, Campbell, M, Dannheim, D, De Gaspari, M, Felici, D, Kulis, S, Llopart, X, Nascetti, A, Poikela, T, Wong, W S
Lenguaje:eng
Publicado: 2014
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/9/01/C01012
http://cds.cern.ch/record/1635171
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author Valerio, P
Alozy, J
Arfaoui, S
Ballabriga, R
Benoit, M
Bonacini, S
Campbell, M
Dannheim, D
De Gaspari, M
Felici, D
Kulis, S
Llopart, X
Nascetti, A
Poikela, T
Wong, W S
author_facet Valerio, P
Alozy, J
Arfaoui, S
Ballabriga, R
Benoit, M
Bonacini, S
Campbell, M
Dannheim, D
De Gaspari, M
Felici, D
Kulis, S
Llopart, X
Nascetti, A
Poikela, T
Wong, W S
author_sort Valerio, P
collection CERN
description A prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64x64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measure- ment of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.
id cern-1635171
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2014
record_format invenio
spelling cern-16351712022-08-10T21:04:28Zdoi:10.1088/1748-0221/9/01/C01012http://cds.cern.ch/record/1635171engValerio, PAlozy, JArfaoui, SBallabriga, RBenoit, MBonacini, SCampbell, MDannheim, DDe Gaspari, MFelici, DKulis, SLlopart, XNascetti, APoikela, TWong, W SA prototype hybrid pixel detector ASIC for the CLIC experimentParticle Physics - ExperimentA prototype hybrid pixel detector ASIC specifically designed to the requirements of the vertex detector for CLIC is described and first electrical measurements are presented. The chip has been designed using a commercial 65 nm CMOS technology and comprises a matrix of 64x64 square pixels with 25 μm pitch. The main features include simultaneous 4-bit measure- ment of Time-over-Threshold (ToT) and Time-of-Arrival (ToA) with 10 ns accuracy, on-chip data compression and power pulsing capability.CLICdp-Conf-2013-004oai:cds.cern.ch:16351712014
spellingShingle Particle Physics - Experiment
Valerio, P
Alozy, J
Arfaoui, S
Ballabriga, R
Benoit, M
Bonacini, S
Campbell, M
Dannheim, D
De Gaspari, M
Felici, D
Kulis, S
Llopart, X
Nascetti, A
Poikela, T
Wong, W S
A prototype hybrid pixel detector ASIC for the CLIC experiment
title A prototype hybrid pixel detector ASIC for the CLIC experiment
title_full A prototype hybrid pixel detector ASIC for the CLIC experiment
title_fullStr A prototype hybrid pixel detector ASIC for the CLIC experiment
title_full_unstemmed A prototype hybrid pixel detector ASIC for the CLIC experiment
title_short A prototype hybrid pixel detector ASIC for the CLIC experiment
title_sort prototype hybrid pixel detector asic for the clic experiment
topic Particle Physics - Experiment
url https://dx.doi.org/10.1088/1748-0221/9/01/C01012
http://cds.cern.ch/record/1635171
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