Development of a parallel trigger framework for rare decay searches

The simplicity of kaon decays (few decay channels, low final-state multiplicities) enable the possibility to reach an excellent sensitivity in the searches of lepton flavor violating decays. The experimental characteristics of decays like $K^+\to \pi^- \mu^+ \mu^+$ are very clear and allow an efficient background rejection. However, the measurement of this kind of events requires the production of a remarkable number of kaon decays. The bandwidth of tape recording system currently available does not allow the storage of all the produced events. A multi-stage selection of the potentially interesting events is required (trigger). At NA62, a first selection is done in real-time (response time $<1$ ms) by the level 0 trigger. The level 0 trigger is based on programmable logic (FPGA) that does not allow the same flexibility of the processors used for software programmable computers. The performance of parallel architectures like multi-cores CPUs and GPUs (Graphics Processing Units), located on computers graphic card, is very promising with a view to their employment for more complex pattern recognition like Čerenkov light rings reconstruction, inside the NA62 RICH detector. In the first chapter of this thesis I present the NA62 experiment and its experimental apparatus in the contest of which this work was carried out. In particular, the theoretical framework of the lepton flavor violating process $K^+\to \pi^- \mu^+ \mu^+$ is discussed with a brief summary of the previous searches of this decay. Heterogeneous parallel computing is described in Chapter 2, focusing on the concepts used to develop a software trigger framework and parallel algorithms running on GPUs. Chapter 3 focuses on the feasibility study on the possibility to use GPUs in a high-bandwidth and low-latency environment like a real-time trigger. At NA62, this study requested the development of various parallel algorithms for the determination of performance along with the bottlenecks detection. In Chapter 4, I describe the development of a high performance software framework that uses multi-threaded programming techniques and fast network drivers for the transmission of trigger primitives from the front end electronics to the GPU memory for the computation and the events selection. Finally, the use of a multi-ring reconstruction algorithm, which runs inside the developed framework, for the selection of $K^+\to \pi^- \mu^+ \mu^+$ events is described in Chapter 5. In order to determine the selection efficiency of the algorithm, I studied the background rejection efficiency and the acceptance for signal events as a function of some selection parameters, hence determining the advantages of this innovative approach.