10 Gbps TCP/IP streams from the FPGA for the CMS DAQ Eventbuilder Network

For the upgrade of the DAQ of the CMS experiment in 2013/2014 an interface between the custom detector Front End Drivers (FEDs) and the new DAQ eventbuilder network has to be designed. For a loss-less data collection from more then 600 FEDs a new FPGA based card implementing the TCP/IP protocol suit...

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Detalles Bibliográficos
Autores principales: Bauer, Gerry, Behrens, Ulf, Branson, James, Chaze, Olivier, Cittolin, Sergio, Coarasa Perez, Jose Antonio, Darlea, Georgiana Lavinia, Deldicque, Christian, Dobson, Marc, Dupont, Aymeric, Erhan, Samim, Gigi, Dominique, Glege, Frank, Gomez Ceballos, Guillelmo, Gomez-Reino Garrido, Robert, Hartl, Christian, Hegeman, Jeroen Guido, Holzner, Andre Georg, Masetti, Lorenzo, Meijers, Franciscus, Meschi, Emilio, Mommsen, Remigius, Morovic, Srecko, Nunez Barranco Fernandez, Carlos, O'Dell, Vivian, Orsini, Luciano, Ozga, Wojciech Andrzej, Paus, Christoph Maria Ernst, Petrucci, Andrea, Pieri, Marco, Racz, Attila, Raginel, Olivier, Sakulin, Hannes, Sani, Matteo, Schwick, Christoph, Spataru, Andrei Cristian, Stieger, Benjamin Bastian, Sumorok, Konstanty, Veverka, Jan, Wakefield, Christopher Colin, Zejdl, Petr
Lenguaje:eng
Publicado: 2013
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/8/12/C12039
http://cds.cern.ch/record/1640924
Descripción
Sumario:For the upgrade of the DAQ of the CMS experiment in 2013/2014 an interface between the custom detector Front End Drivers (FEDs) and the new DAQ eventbuilder network has to be designed. For a loss-less data collection from more then 600 FEDs a new FPGA based card implementing the TCP/IP protocol suite over 10Gbps Ethernet has been developed. We present the hardware challenges and protocol modifications made to TCP in order to simplify its FPGA implementation together with a set of performance measurements which were carried out with the current prototype.

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