The upgrade of the LHCb Vertex Locator (VELO)

The upgrade of the LHCb experiment, planned for 2018, will enable the detector to run at a luminosity of 2 x 10$^{33}$ cm$^{-22}$s$^{-1}$ and explore New Physics effects in the beauty and charm sector with unprecedented precision. To achieve this, the entire readout will be transformed into a triggerless system operating at 40 MHz, where the event selection algorithms will be executed by high-level software in the CPU farm. The upgraded silicon vertex detector (VELO) must be lightweight, radiation hard, vacuum compatible, and has to drive data to the data acquisition system at speeds of up to 3 Tbit/s. This challenge will be met with a new VELO design based on hybrid pixel detectors, positioned to within 5 mm of the LHC colliding beams. The sensors have 55 x 55 $\mu$m$^2$ square pixels and the VeloPix ASIC, which is being developed for the readout, is based on the Timepix/Medipix family of chips. The hottest ASIC will have to cope with integrated hit rates of up to 900 MHz which translates to a bandwidth of more than 15 Gbit/s. Work is in progress to optimise the sensor guard ring design to cope with the irradiation levels, which are highly non-uniform and reach 8 x 10$^{15}$ 1 MeV n$_{eq}$ cm$^{-2}$ at the innermost region. The material budget is optimised with the use of evaporative CO$_2$ coolant circulating in microchannels within a thin silicon substrate. Microchannel cooling brings many advantages: very efficient heat transfer with almost no temperature gradients across the module, no CTE mismatch with silicon components, and a small contribution to the material budget. LHCb is also focussing effort on the construction of a lightweight foil to separate the primary and secondary LHC vacua, the development of high-speed data acquisition boards, and the radiation qualification of the pixel detector modules.