The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS

A clock and data recovery IP, the eCDR, is presented which is intended to be implemented on the detector front-end ASICs that need to communicate with the GBTX by means of e-links. The programmable CDR accepts data at 40, 80, 160 or 320Mbit/s and generates retimed data as well as 40, 80, 160 and 320...

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Detalles Bibliográficos
Autores principales: Tavernier, Filip, Bonacini, S, Francisco, R, Moreira, P, Poltorak, K
Publicado: 2013
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/8/12/C12024
http://cds.cern.ch/record/1709948
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author Tavernier, Filip
Bonacini, S
Francisco, R
Moreira, P
Poltorak, K
author_facet Tavernier, Filip
Bonacini, S
Francisco, R
Moreira, P
Poltorak, K
author_sort Tavernier, Filip
collection CERN
description A clock and data recovery IP, the eCDR, is presented which is intended to be implemented on the detector front-end ASICs that need to communicate with the GBTX by means of e-links. The programmable CDR accepts data at 40, 80, 160 or 320Mbit/s and generates retimed data as well as 40, 80, 160 and 320MHz clocks that are aligned to the retimed data. Moreover, all the outputs have a programmable phase with a resolution of 195ps. An internal calibration mechanism enables the eCDR to lock on incoming data even without the availability of any form of reference clock. The radiation-hard design, integrated in a 130nm CMOS technology, operates at a supply voltage between 1.2V and 1.5V. The power consumption is between 28.5mW and 34.5mW, depending on the settings. The eCDR can achieve a very low RMS jitter below 10ps.
id cern-1709948
institution Organización Europea para la Investigación Nuclear
publishDate 2013
record_format invenio
spelling cern-17099482019-09-30T06:29:59Zdoi:10.1088/1748-0221/8/12/C12024http://cds.cern.ch/record/1709948Tavernier, FilipBonacini, SFrancisco, RMoreira, PPoltorak, KThe eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOSDetectors and Experimental TechniquesA clock and data recovery IP, the eCDR, is presented which is intended to be implemented on the detector front-end ASICs that need to communicate with the GBTX by means of e-links. The programmable CDR accepts data at 40, 80, 160 or 320Mbit/s and generates retimed data as well as 40, 80, 160 and 320MHz clocks that are aligned to the retimed data. Moreover, all the outputs have a programmable phase with a resolution of 195ps. An internal calibration mechanism enables the eCDR to lock on incoming data even without the availability of any form of reference clock. The radiation-hard design, integrated in a 130nm CMOS technology, operates at a supply voltage between 1.2V and 1.5V. The power consumption is between 28.5mW and 34.5mW, depending on the settings. The eCDR can achieve a very low RMS jitter below 10ps.oai:cds.cern.ch:17099482013
spellingShingle Detectors and Experimental Techniques
Tavernier, Filip
Bonacini, S
Francisco, R
Moreira, P
Poltorak, K
The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title_full The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title_fullStr The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title_full_unstemmed The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title_short The eCDR, a Radiation-Hard 40/80/160/320 Mbit/s CDR with internal VCO frequency calibration and 195 ps programmable phase resolution in 130 nm CMOS
title_sort ecdr, a radiation-hard 40/80/160/320 mbit/s cdr with internal vco frequency calibration and 195 ps programmable phase resolution in 130 nm cmos
topic Detectors and Experimental Techniques
url https://dx.doi.org/10.1088/1748-0221/8/12/C12024
http://cds.cern.ch/record/1709948
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