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A Specialized Processor for Track Reconstruction at the LHC Crossing Rate
We present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massiv...
Autores principales: | , , , , , , , , , , , , , , |
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Lenguaje: | eng |
Publicado: |
2014
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/9/09/C09001 http://cds.cern.ch/record/1712406 |
_version_ | 1780936765058580480 |
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author | Abba, A. Bedeschi, F. Citterio, M. Caponio, F. Cusimano, A. Geraci, A. Marino, P. Morello, M.J. Neri, N. Punzi, G. Piucci, A. Ristori, L. Spinella, F. Stracka, S. Tonelli, D. |
author_facet | Abba, A. Bedeschi, F. Citterio, M. Caponio, F. Cusimano, A. Geraci, A. Marino, P. Morello, M.J. Neri, N. Punzi, G. Piucci, A. Ristori, L. Spinella, F. Stracka, S. Tonelli, D. |
author_sort | Abba, A. |
collection | CERN |
description | We present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature. We find that high-quality tracking in large detectors is possible with sub-$\mu$s latencies when this algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices. This opens a possibility of making track reconstruction happen transparently as part of the detector readout. |
id | cern-1712406 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2014 |
record_format | invenio |
spelling | cern-17124062022-08-10T20:21:07Zdoi:10.1088/1748-0221/9/09/C09001http://cds.cern.ch/record/1712406engAbba, A.Bedeschi, F.Citterio, M.Caponio, F.Cusimano, A.Geraci, A.Marino, P.Morello, M.J.Neri, N.Punzi, G.Piucci, A.Ristori, L.Spinella, F.Stracka, S.Tonelli, D.A Specialized Processor for Track Reconstruction at the LHC Crossing Ratephysics.ins-detWe present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature. We find that high-quality tracking in large detectors is possible with sub-$\mu$s latencies when this algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices. This opens a possibility of making track reconstruction happen transparently as part of the detector readout.We present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature. We find that high-quality tracking in large detectors is possible with sub-μs latencies when this algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices. This opens a possibility of making track reconstruction happen transparently as part of the detector readout.We present the results of an R&D study of a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired by studies of the processing of visual images by the brain as it happens in nature. We find that high-quality tracking in large detectors is possible with sub-$\mu$s latencies when this algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices. This opens a possibility of making track reconstruction happen transparently as part of the detector readout.arXiv:1406.7220oai:cds.cern.ch:17124062014-06-27 |
spellingShingle | physics.ins-det Abba, A. Bedeschi, F. Citterio, M. Caponio, F. Cusimano, A. Geraci, A. Marino, P. Morello, M.J. Neri, N. Punzi, G. Piucci, A. Ristori, L. Spinella, F. Stracka, S. Tonelli, D. A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title | A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title_full | A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title_fullStr | A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title_full_unstemmed | A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title_short | A Specialized Processor for Track Reconstruction at the LHC Crossing Rate |
title_sort | specialized processor for track reconstruction at the lhc crossing rate |
topic | physics.ins-det |
url | https://dx.doi.org/10.1088/1748-0221/9/09/C09001 http://cds.cern.ch/record/1712406 |
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