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The RD53 Collaboration's SystemVerilog-UVM Simulation Framework and its General Applicability to Design of Advanced Pixel Readout Chips
The foreseen Phase 2 pixel upgrades at the LHC have very challenging requirements for the design of hybrid pixel readout chips. A versatile pixel simulation platform is as an essential development tool for the design, verification and optimization of both the system architecture and the pixel chip b...
| Autores principales: | , , , , |
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| Formato: | info:eu-repo/semantics/article |
| Lenguaje: | eng |
| Publicado: |
JINST
2014
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/9/10/P10005 http://cds.cern.ch/record/1750098 |