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The contiguity processor: a SIMD architecture for a 2nd level track trigger
| Autores principales: | , |
|---|---|
| Lenguaje: | eng |
| Publicado: |
1988
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| Materias: | |
| Acceso en línea: | http://cds.cern.ch/record/187297 |
| _version_ | 1780881685361983488 |
|---|---|
| author | Darbo, G Heck, B W |
| author_facet | Darbo, G Heck, B W |
| author_sort | Darbo, G |
| collection | CERN |
| id | cern-187297 |
| institution | Organización Europea para la Investigación Nuclear |
| language | eng |
| publishDate | 1988 |
| record_format | invenio |
| spelling | cern-1872972021-03-18T21:02:38Zhttp://cds.cern.ch/record/187297engDarbo, GHeck, B WThe contiguity processor: a SIMD architecture for a 2nd level track triggerDetectors and Experimental TechniquesCERN-EF-88-004CERN-EF-88-04CERN-EF-88-4DELPHI-88-18-DAS-73-TRACK-45oai:cds.cern.ch:1872971988-04-11 |
| spellingShingle | Detectors and Experimental Techniques Darbo, G Heck, B W The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title | The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title_full | The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title_fullStr | The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title_full_unstemmed | The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title_short | The contiguity processor: a SIMD architecture for a 2nd level track trigger |
| title_sort | contiguity processor: a simd architecture for a 2nd level track trigger |
| topic | Detectors and Experimental Techniques |
| url | http://cds.cern.ch/record/187297 |
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