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The contiguity processor: a SIMD architecture for a 2nd level track trigger

Detalles Bibliográficos
Autores principales:	Darbo, G, Heck, B W
Lenguaje:	eng
Publicado:	1988
Materias:	Detectors and Experimental Techniques
Acceso en línea:	http://cds.cern.ch/record/187297

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