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Implementation of a Customisable Readout Sequence for the ALICE ITS Upgrade Explorer Family Chips
Within the ALICE ITS upgrade R&D programme the Explorer family chips are developed featuring 11700 pixels which are split into 18 different sectors with different properties. These pixels are read out sequentially leading to a time span of 2.34ms between the first and last pixel. Due to the long...
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| Lenguaje: | eng |
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2014
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| Acceso en línea: | http://cds.cern.ch/record/1955101 |