Simulation of a macro-pipelined multi-cpu event processor for use in FASTBUS

Detalles Bibliográficos
Autores principales: Letheren, M F, Marchioro, A, Slorach, F
Lenguaje:eng
Publicado: 1989
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/23.41111
http://cds.cern.ch/record/197655

Internet

https://dx.doi.org/10.1109/23.41111
http://cds.cern.ch/record/197655

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