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Pixel front-end development in 65 nm CMOS technology

Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micr...

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Detalles Bibliográficos
Autores principales: Havránek, M, Hemperek, T, Kishishita, T, Krüger, H, Wermes, N
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: JINST 2014
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/9/01/C01003
http://cds.cern.ch/record/1997604
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author Havránek, M
Hemperek, T
Kishishita, T
Krüger, H
Wermes, N
author_facet Havránek, M
Hemperek, T
Kishishita, T
Krüger, H
Wermes, N
author_sort Havránek, M
collection CERN
description Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed.
format info:eu-repo/semantics/article
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institution Organización Europea para la Investigación Nuclear
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spelling cern-19976042019-09-30T06:29:59Z doi:10.1088/1748-0221/9/01/C01003 http://cds.cern.ch/record/1997604 eng Havránek, M Hemperek, T Kishishita, T Krüger, H Wermes, N Pixel front-end development in 65 nm CMOS technology Detectors and Experimental Techniques 3: Microelectronics and interconnection technology 3.3: Shareable IP Blocks for HEP Luminosity upgrade of the LHC (HL-LHC) imposes severe constraints on the detector tracking systems in terms of radiation hardness and capability to cope with higher hit rates. One possible way of keeping track with increasing luminosity is the usage of more advanced technologies. Ultra deep sub-micron CMOS technologies allow a design of complex and high speed electronics with high integration density. In addition, these technologies are inherently radiation hard. We present a prototype of analog pixel front-end integrated circuit designed in 65 nm CMOS technology with applications oriented towards the ATLAS Pixel Detector upgrade. The aspects of ultra deep sub-micron design and performance of the analog pixel front-end circuits will be discussed. info:eu-repo/grantAgreement/EC/FP7/262025 info:eu-repo/semantics/openAccess Education Level info:eu-repo/semantics/article http://cds.cern.ch/record/1997604 JINST JINST, (2014) pp. C01003 2014
spellingShingle Detectors and Experimental Techniques
3: Microelectronics and interconnection technology
3.3: Shareable IP Blocks for HEP
Havránek, M
Hemperek, T
Kishishita, T
Krüger, H
Wermes, N
Pixel front-end development in 65 nm CMOS technology
title Pixel front-end development in 65 nm CMOS technology
title_full Pixel front-end development in 65 nm CMOS technology
title_fullStr Pixel front-end development in 65 nm CMOS technology
title_full_unstemmed Pixel front-end development in 65 nm CMOS technology
title_short Pixel front-end development in 65 nm CMOS technology
title_sort pixel front-end development in 65 nm cmos technology
topic Detectors and Experimental Techniques
3: Microelectronics and interconnection technology
3.3: Shareable IP Blocks for HEP
url https://dx.doi.org/10.1088/1748-0221/9/01/C01003
http://cds.cern.ch/record/1997604
http://cds.cern.ch/record/1997604
work_keys_str_mv AT havranekm pixelfrontenddevelopmentin65nmcmostechnology
AT hemperekt pixelfrontenddevelopmentin65nmcmostechnology
AT kishishitat pixelfrontenddevelopmentin65nmcmostechnology
AT krugerh pixelfrontenddevelopmentin65nmcmostechnology
AT wermesn pixelfrontenddevelopmentin65nmcmostechnology