Cargando…
Top-down digital VLSI design : from architectures to gate-level circuits and FPGAs
Autor principal: | |
---|---|
Lenguaje: | eng |
Publicado: |
Morgan Kaufmann
2015
|
Materias: | |
Acceso en línea: | http://cds.cern.ch/record/2000783 |
_version_ | 1780945980545302528 |
---|---|
author | Kaeslin, Hubert |
author_facet | Kaeslin, Hubert |
author_sort | Kaeslin, Hubert |
collection | CERN |
id | cern-2000783 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2015 |
publisher | Morgan Kaufmann |
record_format | invenio |
spelling | cern-20007832021-04-21T20:25:41Zhttp://cds.cern.ch/record/2000783engKaeslin, Hubert Top-down digital VLSI design : from architectures to gate-level circuits and FPGAs EngineeringMorgan Kaufmannoai:cds.cern.ch:20007832015 |
spellingShingle | Engineering Kaeslin, Hubert Top-down digital VLSI design : from architectures to gate-level circuits and FPGAs |
title |
Top-down digital VLSI design
:
from architectures to gate-level circuits and FPGAs
|
title_full |
Top-down digital VLSI design
:
from architectures to gate-level circuits and FPGAs
|
title_fullStr |
Top-down digital VLSI design
:
from architectures to gate-level circuits and FPGAs
|
title_full_unstemmed |
Top-down digital VLSI design
:
from architectures to gate-level circuits and FPGAs
|
title_short |
Top-down digital VLSI design
:
from architectures to gate-level circuits and FPGAs
|
title_sort | top-down digital vlsi design
:
from architectures to gate-level circuits and fpgas |
topic | Engineering |
url | http://cds.cern.ch/record/2000783 |
work_keys_str_mv | AT kaeslinhubert topdowndigitalvlsidesignfromarchitecturestogatelevelcircuitsandfpgas |