A Fast hardware Tracker for the ATLAS Trigger system

The trigger system at the ATLAS experiment is designed to lower the event rate occurring from the nominal bunch crossing at 40 MHz to about 1 kHz for a designed LHC luminosity of 10$^{34}$ cm$^{-2}$ s$^{-1}$. After a very successful data taking run the LHC is expected to run starting in 2015 with much higher instantaneous luminosities and this will increase the load on the High Level Trigger system. More sophisticated algorithms will be needed to achieve higher background rejection while maintaining good efficiency for interesting physics signals, which requires a more extensive use of tracking information. The Fast Tracker (FTK) trigger system, part of the ATLAS trigger upgrade program, is a highly parallel hardware device designed to perform full-scan track-finding at the event rate of 100 kHz. FTK is a dedicated processor based on a mixture of advanced technologies. Modern, powerful, Field Programmable Gate Arrays form an important part of the system architecture, and the combinatorial problem of pattern recognition is solved by ~8000 standard-cell ASICs named Associative Memories. FTK provides track reconstruction based on the full silicon detector with resolution comparable to the offline reconstruction in approximately 100 $\mu$s/event allowing a fast precise detection of the primary and secondary vertex information. The availability of the full tracking and vertex information will ensure robust selections within the latency available at the HLT and even allow improved trigger performance, compared to the run I, for the most difficult signatures such as $b$-jets and $\tau$s. We present the architecture of the FTK system, the results from integration tests of a slice of the FTK at CERN and discuss the expected physics performance in the harsh environment of high pile-up and high luminosities expected for LHC run II.