Cargando…
Unlock performance secrets of next-gen Intel hardware
<!--HTML--><p style="text-align: justify;"> Software must be optimized for both threaded and SIMD vector parallelism to achieve scaled performance on modern machines. The gap (often 2 orders of magnitude) between modernized workloads and unoptimized baselines is increasing with...
Autor principal: | Dr. Matveev, Zakhar A. |
---|---|
Lenguaje: | eng |
Publicado: |
2015
|
Materias: | |
Acceso en línea: | http://cds.cern.ch/record/2018485 |
Ejemplares similares
-
Accessing Intel FPGAs for Acceleration
por: Qi, Karl
Publicado: (2018) -
Open Protocols for Open Hardware
por: Vucinic, Dejan
Publicado: (2019) -
Scientific Computing and Apple's Intel Transition
por: CERN. Geneva
Publicado: (2006) -
Train with noise for accurate machine inference using imperfect hardware
por: Vucinic, Dejan
Publicado: (2019) -
Advanced Features of Intel® C++ Composer XE for Linux
por: Arnold, Jeffrey
Publicado: (2011)