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Digital integrated circuits: design-for-test using Simulink and Stateflow
INTRODUCTIONSIMULINK®: DYNAMIC SYSTEM SIMULATION FOR MATLAB®IntroductionCreating a Model Running a Simulation Analyzing Simulation Results Subsystems: Using Masks to Customize Blocks Reference BlocksSimulink Debugger STATEFLOW®: CREATING FINITE STATE MACHINE MODELSIntroduction Creating Charts Enteri...
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Lenguaje: | eng |
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CRC Press
2006
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Acceso en línea: | http://cds.cern.ch/record/2018834 |
Sumario: | INTRODUCTIONSIMULINK®: DYNAMIC SYSTEM SIMULATION FOR MATLAB®IntroductionCreating a Model Running a Simulation Analyzing Simulation Results Subsystems: Using Masks to Customize Blocks Reference BlocksSimulink Debugger STATEFLOW®: CREATING FINITE STATE MACHINE MODELSIntroduction Creating Charts Entering a Stateflow DiagramDefining Events and Data Defining Stateflow InterfacesExploring and Searching DebuggingFAULT MODELING AND SIMULATION Fault ModelingFault SimulationTESTABILITY ANALYSIS METHODS Combinational Controllability and Observability Analysis ModelsSequential Controllability and Observab |
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