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Digital design and verilog HDL fundamentals

Comprehensive and self contained, this tutorial covers the design of a plethora of combinational and sequential logic circuits using conventional logic design and Verilog HDL. Number systems and number representations are presented along with various binary codes. Several advanced topics are covered...

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Autor principal: Cavanagh, Joseph
Lenguaje:eng
Publicado: CRC Press 2011
Materias:
Acceso en línea:http://cds.cern.ch/record/2024561
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author Cavanagh, Joseph
author_facet Cavanagh, Joseph
author_sort Cavanagh, Joseph
collection CERN
description Comprehensive and self contained, this tutorial covers the design of a plethora of combinational and sequential logic circuits using conventional logic design and Verilog HDL. Number systems and number representations are presented along with various binary codes. Several advanced topics are covered, including functional decomposition and iterative networks. A variety of examples are provided for combinational and sequential logic, computer arithmetic, and advanced topics such as Hamming code error correction. Constructs supported by Verilog are described in detail. All designs are continued to completion. Each chapter includes numerous design issues of varying complexity to be resolved by the reader.
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publishDate 2011
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spelling cern-20245612021-04-21T20:11:33Zhttp://cds.cern.ch/record/2024561engCavanagh, JosephDigital design and verilog HDL fundamentalsEngineeringComprehensive and self contained, this tutorial covers the design of a plethora of combinational and sequential logic circuits using conventional logic design and Verilog HDL. Number systems and number representations are presented along with various binary codes. Several advanced topics are covered, including functional decomposition and iterative networks. A variety of examples are provided for combinational and sequential logic, computer arithmetic, and advanced topics such as Hamming code error correction. Constructs supported by Verilog are described in detail. All designs are continued to completion. Each chapter includes numerous design issues of varying complexity to be resolved by the reader.CRC Pressoai:cds.cern.ch:20245612011
spellingShingle Engineering
Cavanagh, Joseph
Digital design and verilog HDL fundamentals
title Digital design and verilog HDL fundamentals
title_full Digital design and verilog HDL fundamentals
title_fullStr Digital design and verilog HDL fundamentals
title_full_unstemmed Digital design and verilog HDL fundamentals
title_short Digital design and verilog HDL fundamentals
title_sort digital design and verilog hdl fundamentals
topic Engineering
url http://cds.cern.ch/record/2024561
work_keys_str_mv AT cavanaghjoseph digitaldesignandveriloghdlfundamentals