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Readout Architecture for Hybrid Pixel Readout Chips
The original contribution of this thesis to knowledge are novel digital readout architectures for hybrid pixel readout chips. The thesis presents asynchronous bus-based architecture, a data-node based column architecture and a network-based pixel matrix architecture for data transportation. It is sh...
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| Lenguaje: | eng |
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2015
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| Acceso en línea: | http://cds.cern.ch/record/2042198 |