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Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization

The LHCb experiment at the LHC accelerator at CERN collects collisions of particle bunches at 40 MHz. After a first level of hardware trigger with output of 1 MHz, the physically interesting collisions are selected by running dedicated trigger algorithms in the High Level Trigger (HLT) computing far...

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Detalles Bibliográficos
Autores principales: Frank, Markus, Gaspar, C, v.Herwijnen, E, Jost, B, Neufeld, N
Publicado: 2014
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1742-6596/513/1/012006
http://cds.cern.ch/record/2055698
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author Frank, Markus
Gaspar, C
v.Herwijnen, E
Jost, B
Neufeld, N
author_facet Frank, Markus
Gaspar, C
v.Herwijnen, E
Jost, B
Neufeld, N
author_sort Frank, Markus
collection CERN
description The LHCb experiment at the LHC accelerator at CERN collects collisions of particle bunches at 40 MHz. After a first level of hardware trigger with output of 1 MHz, the physically interesting collisions are selected by running dedicated trigger algorithms in the High Level Trigger (HLT) computing farm. This farm consists of up to roughly 25000 CPU cores in roughly 1600 physical nodes each equipped with at least 1 TB of local storage space. This work describes the architecture to treble the available CPU power of the HLT farm given that the LHC collider in previous years delivered stable physics beams about 30% of the time. The gain is achieved by splitting the event selection process in two, a first stage reducing the data taken during stable beams and buffering the preselected particle collisions locally. A second processing stage running constantly at lower priority will then finalize the event filtering process and benefits fully from the time when LHC does not deliver stable beams e.g. while preparing a new physics fill or during periods used for machine development.
id cern-2055698
institution Organización Europea para la Investigación Nuclear
publishDate 2014
record_format invenio
spelling cern-20556982022-08-17T13:32:45Zdoi:10.1088/1742-6596/513/1/012006http://cds.cern.ch/record/2055698Frank, MarkusGaspar, Cv.Herwijnen, EJost, BNeufeld, NDeferred High Level Trigger in LHCb: A Boost to CPU Resource UtilizationDetectors and Experimental TechniquesComputing and ComputersThe LHCb experiment at the LHC accelerator at CERN collects collisions of particle bunches at 40 MHz. After a first level of hardware trigger with output of 1 MHz, the physically interesting collisions are selected by running dedicated trigger algorithms in the High Level Trigger (HLT) computing farm. This farm consists of up to roughly 25000 CPU cores in roughly 1600 physical nodes each equipped with at least 1 TB of local storage space. This work describes the architecture to treble the available CPU power of the HLT farm given that the LHC collider in previous years delivered stable physics beams about 30% of the time. The gain is achieved by splitting the event selection process in two, a first stage reducing the data taken during stable beams and buffering the preselected particle collisions locally. A second processing stage running constantly at lower priority will then finalize the event filtering process and benefits fully from the time when LHC does not deliver stable beams e.g. while preparing a new physics fill or during periods used for machine development.oai:cds.cern.ch:20556982014
spellingShingle Detectors and Experimental Techniques
Computing and Computers
Frank, Markus
Gaspar, C
v.Herwijnen, E
Jost, B
Neufeld, N
Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title_full Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title_fullStr Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title_full_unstemmed Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title_short Deferred High Level Trigger in LHCb: A Boost to CPU Resource Utilization
title_sort deferred high level trigger in lhcb: a boost to cpu resource utilization
topic Detectors and Experimental Techniques
Computing and Computers
url https://dx.doi.org/10.1088/1742-6596/513/1/012006
http://cds.cern.ch/record/2055698
work_keys_str_mv AT frankmarkus deferredhighleveltriggerinlhcbaboosttocpuresourceutilization
AT gasparc deferredhighleveltriggerinlhcbaboosttocpuresourceutilization
AT vherwijnene deferredhighleveltriggerinlhcbaboosttocpuresourceutilization
AT jostb deferredhighleveltriggerinlhcbaboosttocpuresourceutilization
AT neufeldn deferredhighleveltriggerinlhcbaboosttocpuresourceutilization