Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement

A 15MS/s, 10 ppm repeatable acquisition system to characterize 3 μs rise-time trapezoidal voltage pulses is proposed. The system is based mainly on a low-noise, 5MHz bandwidth analog front-end. In this paper, the requirements, the concept and physical design are illustrated. Simulation results aimed...

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Detalles Bibliográficos
Autores principales: Baccigalupi, Carlo, Arpaia, Pasquale, Cerqueira Bastos, Miguel, Martino, Michele
Lenguaje:eng
Publicado: 2015
Materias:
Engineering
Acceso en línea:http://cds.cern.ch/record/2058163
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author Baccigalupi, Carlo
Arpaia, Pasquale
Cerqueira Bastos, Miguel
Martino, Michele
author_facet Baccigalupi, Carlo
Arpaia, Pasquale
Cerqueira Bastos, Miguel
Martino, Michele
author_sort Baccigalupi, Carlo
collection CERN
description A 15MS/s, 10 ppm repeatable acquisition system to characterize 3 μs rise-time trapezoidal voltage pulses is proposed. The system is based mainly on a low-noise, 5MHz bandwidth analog front-end. In this paper, the requirements, the concept and physical design are illustrated. Simulation results aimed at assessing the circuit performance are presented. An experimental case study on the characterization of a pulsed power supply for the klystrons modulators of the Compact Linear Collider (CLIC) under study at CERN is reported. In particular, the experimental metrological characterization of the prototype in terms of bandwidth and noise is presented.
id cern-2058163
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2015
record_format invenio
spelling cern-20581632019-09-30T06:29:59Zhttp://cds.cern.ch/record/2058163engBaccigalupi, CarloArpaia, PasqualeCerqueira Bastos, MiguelMartino, MicheleDesign of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses MeasurementEngineeringA 15MS/s, 10 ppm repeatable acquisition system to characterize 3 μs rise-time trapezoidal voltage pulses is proposed. The system is based mainly on a low-noise, 5MHz bandwidth analog front-end. In this paper, the requirements, the concept and physical design are illustrated. Simulation results aimed at assessing the circuit performance are presented. An experimental case study on the characterization of a pulsed power supply for the klystrons modulators of the Compact Linear Collider (CLIC) under study at CERN is reported. In particular, the experimental metrological characterization of the prototype in terms of bandwidth and noise is presented.CERN-ACC-2015-0116oai:cds.cern.ch:20581632015-10-08
spellingShingle Engineering
Baccigalupi, Carlo
Arpaia, Pasquale
Cerqueira Bastos, Miguel
Martino, Michele
Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title_full Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title_fullStr Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title_full_unstemmed Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title_short Design of an Ultra-Low Noise Analogue Front-End for Fast Voltage Pulses Measurement
title_sort design of an ultra-low noise analogue front-end for fast voltage pulses measurement
topic Engineering
url http://cds.cern.ch/record/2058163
work_keys_str_mv AT baccigalupicarlo designofanultralownoiseanaloguefrontendforfastvoltagepulsesmeasurement
AT arpaiapasquale designofanultralownoiseanaloguefrontendforfastvoltagepulsesmeasurement
AT cerqueirabastosmiguel designofanultralownoiseanaloguefrontendforfastvoltagepulsesmeasurement
AT martinomichele designofanultralownoiseanaloguefrontendforfastvoltagepulsesmeasurement

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