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High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation

This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores re...

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Detalles Bibliográficos
Autores principales: Palchaudhuri, Ayan, Chakraborty, Rajat Subhra
Lenguaje:eng
Publicado: Springer 2016
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-81-322-2520-1
http://cds.cern.ch/record/2062558
_version_ 1780948541838983168
author Palchaudhuri, Ayan
Chakraborty, Rajat Subhra
author_facet Palchaudhuri, Ayan
Chakraborty, Rajat Subhra
author_sort Palchaudhuri, Ayan
collection CERN
description This book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.
id cern-2062558
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2016
publisher Springer
record_format invenio
spelling cern-20625582021-04-21T20:03:27Zdoi:10.1007/978-81-322-2520-1http://cds.cern.ch/record/2062558engPalchaudhuri, AyanChakraborty, Rajat SubhraHigh performance integer arithmetic circuit design on FPGA: architecture, implementation and design automationEngineeringThis book describes the optimized implementations of several arithmetic datapath, controlpath and pseudorandom sequence generator circuits for realization of high performance arithmetic circuits targeted towards a specific family of the high-end Field Programmable Gate Arrays (FPGAs). It explores regular, modular, cascadable, and bit-sliced architectures of these circuits, by directly instantiating the target FPGA-specific primitives in the HDL. Every proposed architecture is justified with detailed mathematical analyses. Simultaneously, constrained placement of the circuit building blocks is performed, by placing the logically related hardware primitives in close proximity to one another by supplying relevant placement constraints in the Xilinx proprietary “User Constraints File”. The book covers the implementation of a GUI-based CAD tool named FlexiCore integrated with the Xilinx Integrated Software Environment (ISE) for design automation of platform-specific high-performance arithmetic circuits from user-level specifications. This tool has been used to implement the proposed circuits, as well as hardware implementations of integer arithmetic algorithms where several of the proposed circuits are used as building blocks. Implementation results demonstrate higher performance and superior operand-width scalability for the proposed circuits, with respect to implementations derived through other existing approaches. This book will prove useful to researchers, students, and professionals engaged in the domain of FPGA circuit optimization and implementation.Springeroai:cds.cern.ch:20625582016
spellingShingle Engineering
Palchaudhuri, Ayan
Chakraborty, Rajat Subhra
High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title_full High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title_fullStr High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title_full_unstemmed High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title_short High performance integer arithmetic circuit design on FPGA: architecture, implementation and design automation
title_sort high performance integer arithmetic circuit design on fpga: architecture, implementation and design automation
topic Engineering
url https://dx.doi.org/10.1007/978-81-322-2520-1
http://cds.cern.ch/record/2062558
work_keys_str_mv AT palchaudhuriayan highperformanceintegerarithmeticcircuitdesignonfpgaarchitectureimplementationanddesignautomation
AT chakrabortyrajatsubhra highperformanceintegerarithmeticcircuitdesignonfpgaarchitectureimplementationanddesignautomation