1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.

Under the scope of a CERN summer student project, the schematic for ADC based on FMC mezzanine card with 1 GSPS sampling rate and 8 bit resolution was developed. The mezzanine is fully compatible with the standard: FPGA Mezzanine Card (FMC) [1]. A low-pin count connector was used to connect the mezz...

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Autor principal: Vasilyev, Mikhail
Lenguaje:eng
Publicado: 2015
Materias:
Accelerators and Storage Rings
Acceso en línea:http://cds.cern.ch/record/2063663
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author Vasilyev, Mikhail
author_facet Vasilyev, Mikhail
author_sort Vasilyev, Mikhail
collection CERN
description Under the scope of a CERN summer student project, the schematic for ADC based on FMC mezzanine card with 1 GSPS sampling rate and 8 bit resolution was developed. The mezzanine is fully compatible with the standard: FPGA Mezzanine Card (FMC) [1]. A low-pin count connector was used to connect the mezzanine with the “carrier”. The carrier was an Open Hardware project: Simple PCIe FMC carrier (SPEC).
id cern-2063663
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2015
record_format invenio
spelling cern-20636632019-09-30T06:29:59Zhttp://cds.cern.ch/record/2063663engVasilyev, Mikhail1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.Accelerators and Storage RingsUnder the scope of a CERN summer student project, the schematic for ADC based on FMC mezzanine card with 1 GSPS sampling rate and 8 bit resolution was developed. The mezzanine is fully compatible with the standard: FPGA Mezzanine Card (FMC) [1]. A low-pin count connector was used to connect the mezzanine with the “carrier”. The carrier was an Open Hardware project: Simple PCIe FMC carrier (SPEC).CERN-STUDENTS-Note-2015-247oai:cds.cern.ch:20636632015-08-22
spellingShingle Accelerators and Storage Rings
Vasilyev, Mikhail
1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title 1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title_full 1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title_fullStr 1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title_full_unstemmed 1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title_short 1 GSPS digitizer based on the FPGA Mezzanine Card (FMC) standard with low-count pin connector.
title_sort 1 gsps digitizer based on the fpga mezzanine card (fmc) standard with low-count pin connector.
topic Accelerators and Storage Rings
url http://cds.cern.ch/record/2063663
work_keys_str_mv AT vasilyevmikhail 1gspsdigitizerbasedonthefpgamezzaninecardfmcstandardwithlowcountpinconnector

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