The PreProcessors for the ATLAS Tile Calorimeter Phase II Upgrade

The Large Hadron Collider (LHC) has envisaged a series of upgrades towards a High Luminosity LHC (HL-LHC) delivering five times the LHC nominal instantaneous luminosity. The ATLAS Phase II upgrade will accommodate the detector and data acquisition system for the HL-LHC. In particular, the Tile Hadronic Calorimeter (TileCal) will replace completely on- and off-detector electronics using a new read-out architecture. The digitized detector data will be transferred for every beam crossing to the super Read Out Drivers (sRODs) located in off-detector counting rooms with a total data bandwidth of roughly 80 Tbps. The sROD implements increased pipelines memories and must provide pre-processed digital trigger information to Level 0/1 systems. The sROD module represents the link between the on-detector electronics and the overall ATLAS data acquisition system. It also implements the interface between the Detector Control System (DCS) and the on-detector electronics which is used to control and monitor the high voltage distribution system. The sROD is responsible of transmitting the commands to configure, control and monitor the on-detector read-out electronics. We present the TileCal sROD requirements and plans for the Phase II Upgrade of ATLAS as well as performance results of the first sROD prototype which has been built for the TileCal Demonstrator.