Logic synthesis for FPGA-based finite state machines

This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existe...

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Detalles Bibliográficos
Autores principales: Barkalov, Alexander, Titarenko, Larysa, Kolopienczyk, Malgorzata, Mielcarek, Kamil, Bazydlo, Grzegorz
Lenguaje:eng
Publicado: Springer 2016
Materias:
Engineering
Acceso en línea:https://dx.doi.org/10.1007/978-3-319-24202-6
http://cds.cern.ch/record/2112842
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author Barkalov, Alexander
Titarenko, Larysa
Kolopienczyk, Malgorzata
Mielcarek, Kamil
Bazydlo, Grzegorz
author_facet Barkalov, Alexander
Titarenko, Larysa
Kolopienczyk, Malgorzata
Mielcarek, Kamil
Bazydlo, Grzegorz
author_sort Barkalov, Alexander
collection CERN
description This book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.
id cern-2112842
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2016
publisher Springer
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spelling cern-21128422021-04-21T20:00:55Zdoi:10.1007/978-3-319-24202-6http://cds.cern.ch/record/2112842engBarkalov, AlexanderTitarenko, LarysaKolopienczyk, MalgorzataMielcarek, KamilBazydlo, GrzegorzLogic synthesis for FPGA-based finite state machinesEngineeringThis book discusses control units represented by the model of a finite state machine (FSM). It contains various original methods and takes into account the peculiarities of field-programmable gate arrays (FPGA) chips and a FSM model. It shows that one of the peculiarities of FPGA chips is the existence of embedded memory blocks (EMB). The book is devoted to the solution of problems of logic synthesis and reduction of hardware amount in control units. The book will be interesting and useful for researchers and PhD students in the area of Electrical Engineering and Computer Science, as well as for designers of modern digital systems.Springeroai:cds.cern.ch:21128422016
spellingShingle Engineering
Barkalov, Alexander
Titarenko, Larysa
Kolopienczyk, Malgorzata
Mielcarek, Kamil
Bazydlo, Grzegorz
Logic synthesis for FPGA-based finite state machines
title Logic synthesis for FPGA-based finite state machines
title_full Logic synthesis for FPGA-based finite state machines
title_fullStr Logic synthesis for FPGA-based finite state machines
title_full_unstemmed Logic synthesis for FPGA-based finite state machines
title_short Logic synthesis for FPGA-based finite state machines
title_sort logic synthesis for fpga-based finite state machines
topic Engineering
url https://dx.doi.org/10.1007/978-3-319-24202-6
http://cds.cern.ch/record/2112842
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AT titarenkolarysa logicsynthesisforfpgabasedfinitestatemachines
AT kolopienczykmalgorzata logicsynthesisforfpgabasedfinitestatemachines
AT mielcarekkamil logicsynthesisforfpgabasedfinitestatemachines
AT bazydlogrzegorz logicsynthesisforfpgabasedfinitestatemachines

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