Trigger Algorithms and Electronics for the ATLAS Muon NSW Upgrade

The ATLAS New Small Wheel (NSW), comprising MicroMegas (MMs) and small-strip Thin Gap Chambers (sTGCs), will upgrade the ATLAS muon system for a high background environment. Particularly, the NSW trigger will reduce the rate of fake triggers coming from background tracks in the endcap. We will present an overview of the FPGA-based trigger processor for NSW and trigger algorithms for sTGC and Micromegas detector sub systems. In additional, we will present development of NSW trigger electronics, in particular, the sTGC Trigger Data Serializer (TDS) ASIC, sTGC Pad Trigger board, the sTGC data packet router and L1 Data Driver Card. Finally, we will detail the challenges of meeting the low latency requirements of the trigger system and coping with the high background rates of the HL-LHC.