Study and Development of a novel Silicon Pixel Detector for the Upgrade of the ALICE Inner Tracking System

ALICE (A Large Ion Collider Experiment) is the heavy-ion experiment at the CERN Large Hadron Collider (LHC). As an important part of its upgrade plans, the ALICE experiment schedules the installation of a new Inner Tracking System (ITS) during the Long Shutdown 2 (LS2) of the LHC in 2019/20. The new ITS will consist of seven concentric layers, covering about 10m2 with Monolithic Active Pixel Sensors (MAPS). This choice of technology has been guided by the tight requirements on the material budget of 0.3 % x/X0 per layer for the three innermost layers and backed by the significant progress in the field of MAPS in recent years. The pixel chips are manufactured in the TowerJazz 180 nm CMOS process on wafers with a high-resistivity epitaxial layer on top of the substrate. During the R&D phase several chip architectures have been investigated, which take full advantage of a particular process feature, the deep p-well, that allows for full CMOS circuitry within the pixel matrix while retaining full charge collection efficiency. Together with the small feature size, this allows to implement a continuously active front-end into each pixel and using a sparsified readout scheme that only sends the addresses of hit pixels to the periphery - an approach followed by the so-called ALPIDE design. As another distinguishing feature, the ALPIDE design provides the possibility to apply a reverse bias voltage via the substrate, which allows to significantly increase the depletion regions around the charge collection diodes. This thesis is carried out within the framework of the R&D on the pixel chip for the ALICE ITS upgrade, and in particular the ALPIDE design. The work can be categorized in two main parts: • The modeling and characterization of the sensitive layer and the charge collection electrode of the pixel chip, with a particular focus on the Q/C ratio, that is, the ratio of the collected charge in a single pixel and the pixel input capacitance. • The characterization of the first final-size (3 × 1.5 cm2) ALPIDE prototype, with a particular focus on the functionality of its novel low-power front-end. To study the characteristics of the sensitive layer and the collection electrode, various small-scale prototypes with analogue readout were produced. These prototypes contain many pixel designs with varying pixel pitch, epitaxial layer properties and collection electrode geometry. Exploiting X-rays from an 55Fe source, I performed extensive studies on the influence of all these parameters, and furthermore the reverse substrate bias voltage, on the charge collection process and the pixel-input capacitance. In addition, I significantly contributed to various measurements using particle beam tests. In order to quantify the radiation induced effects on the sensor performance, the studies were performed before and after irradiation. Along with the measurements, I also modeled the charge collection in the partially depleted sensitive layer characteristic for the used technology. After a series of small-scale prototypes, a first final-size (3 × 1.5 cm2) prototype of the ALPIDE, the so-called pALPIDE-1, was submitted. For this prototype, I performed comprehensive lab-studies on the behaviour of the analogue part of the front-end circuit. Furthermore, also for the pALPIDE-1 I significantly contributed to the measurements employing particle test beams. The lab and test beam measurements allowed an assessment of decisive chip performance parameters as detection efficiency, fake hit rate, and position resolution, and demonstrated the feasibility and attractiveness of the ALPIDE design. This work represents a key contribution to the characterization and optimization efforts towards the final design of the pixel chip for the new ALICE ITS. The intensive R&D carried out within the framework of the ALICE ITS upgrade led to a significant advancement of the technology of MAPS regarding power consumption, readout speed, charge collection time and radiation hardness.