Design and Test of a Signal Packet Router Prototype for the ATLAS NSW sTGC Detector

Abstract– The New Small Wheel (NSW) small-strip thin-gap chambers (sTGC) detector will be installed in Large Hadron Collider (LHC) during ATLAS Phase-I upgrade. For sTGC detector, it requires very high-speed electronic triggering of signal events. On detecting a signal peak, sTGC front-end trigger logic will send out serialized track information on twinax fast serial copper wires to the signal packet Router on the periphery of the new small wheel. The signal packet Router boards handle all incoming traffic from the TDS chips (4.8 Gbps), serving as a very fast switching-yard between incoming active TDS signals and a limited number of optoelectronic outputs. There are several design requirements on router: radiation-hard (9kRad), high-speed serial link and low fixed latency in FPGA (field-programmable gate array) data processing. To meet those requirements, a router prototype has been developed for demonstration purpose. The components used in router prototype have been tested in radiation environment to meet ATLAS radiation tolerance criteria (RTC). We will present the design and the test result of the router prototype.