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Digital logic design using verilog: coding and RTL synthesis

This book is designed to serve as a hands-on professional reference with additional utility as a textbook for upper undergraduate and some graduate courses in digital logic design. This book is organized in such a way that that it can describe a number of RTL design scenarios, from simple to complex...

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Detalles Bibliográficos
Autor principal: Taraate, Vaibbhav
Lenguaje:eng
Publicado: Springer 2016
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-81-322-2791-5
http://cds.cern.ch/record/2157634