Emulation of a prototype FPGA track finder for the CMS Phase-2 upgrade with the CIDAF emulation framework.

The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the l...

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Detalles Bibliográficos
Autores principales: Amstutz, Christian, Ball, Fionn Amhairghen, Balzer, Matthias Norbert, Brooke, James John, Calligaris, Luigi, Cieri, Davide, Clement, Emyr John, Hall, Geoffrey, Harbaum, Tanja Renate, Harder, Kristian, Hobson, Peter, Iles, Gregory Michiel, James, Thomas Owen, Manolopoulos, Konstantinos, Matsushita, Takashi, Morton, Alexander, Newbold, David, Paramesvaran, Sudarshan, Pesaresi, Mark Franco, Reid, Ivan, Rose, A. W, Sander, Oliver, Schuh, Thomas, Shepherd-Themistocleous, Claire, Shtipliyski, Antoni, Summers, Sioni Paris, Tapper, Alexander, Tomalin, Ian, Uchida, Kirika, Vichoudis, Paschalis, Weber, M
Lenguaje:eng
Publicado: 2016
Materias:
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1109/RTC.2016.7543110
http://cds.cern.ch/record/2194515
Descripción
Sumario:The CMS collaboration is preparing a major upgrade of its detector, so it can operate during the high luminosity run of the LHC from 2026. The upgraded tracker electronics will reconstruct the trajectories of charged particles within a latency of a few microseconds, so that they can be used by the level-1 trigger. An emulation framework, CIDAF, has been developed to provide a reference for a proposed FPGA-based implementation of this track finder, which employs a Time-Multiplexed (TM) technique for data processing.

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