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Invasive tightly coupled processor arrays

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requiremen...

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Detalles Bibliográficos
Autor principal: LARI, VAHID
Lenguaje:eng
Publicado: Springer 2016
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-981-10-1058-3
http://cds.cern.ch/record/2205617
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author LARI, VAHID
author_facet LARI, VAHID
author_sort LARI, VAHID
collection CERN
description This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs. .
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spelling cern-22056172021-04-21T19:33:40Zdoi:10.1007/978-981-10-1058-3http://cds.cern.ch/record/2205617engLARI, VAHIDInvasive tightly coupled processor arraysEngineeringThis book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs. .Springeroai:cds.cern.ch:22056172016
spellingShingle Engineering
LARI, VAHID
Invasive tightly coupled processor arrays
title Invasive tightly coupled processor arrays
title_full Invasive tightly coupled processor arrays
title_fullStr Invasive tightly coupled processor arrays
title_full_unstemmed Invasive tightly coupled processor arrays
title_short Invasive tightly coupled processor arrays
title_sort invasive tightly coupled processor arrays
topic Engineering
url https://dx.doi.org/10.1007/978-981-10-1058-3
http://cds.cern.ch/record/2205617
work_keys_str_mv AT larivahid invasivetightlycoupledprocessorarrays