Configuration of SoC FPGA, Booting of HPS and running Bare Metal Application from SD card.

First, a hardware design is created using Qsys in Quartus 16.0. Creation of the hardware design consists of configuring Hard Processor System (HPS) inside FPGA and adding necessary hardware blocks to the design. After generating the Qsys design, it is then instantiated in top level module in Verilog or VHDL. After setting up all pin assignments and adding all necessary files in the design, project is compiled to have a complete hardware design. Second part comprises full software design in correspondence with the hardware design and booting the HPS from SD card. Software includes enabling the different bridges used by HPS to communicate with FPGA, configuring FPGA from HPS and embedded application itself. Finally, everything is added in the SD card to get a complete automatic bare metal application running on the host board without any configuration what so ever.