Cargando…

Multi-threaded ATLAS Simulation on Intel Knights Landing Processors

Mostrar otras versiones (1)

The Knights Landing (KNL) release of the Intel Many Integrated Core (MIC) Xeon Phi line of processors is a potential game changer for HEP computing. With 72 cores and deep vector registers, the KNL cards promise significant performance benefits for highly-parallel, compute-heavy applications. Cori,...

Descripción completa

Detalles Bibliográficos
Autores principales:	Farrell, Steven, Dotti, Andrea, Calafiura, Paolo, Leggett, Charles, Tsulaia, Vakhtang
Lenguaje:	eng
Publicado:	2016
Materias:	Particle Physics - Experiment
Acceso en línea:	http://cds.cern.ch/record/2220833

Ejemplares similares

Multi-threaded ATLAS simulation on Intel Knights Landing processors
por: Farrell, Steven, et al.
Publicado: (2017)

Intel Xeon Phi processor high performance programming: knights landing edition
por: Jeffers, James, et al.
Publicado: (2016)

Object identification with deep learning using Intel DAAL on Knights Landing processor [Vidyo]
por: Ojika, David Nonso
Publicado: (2017)

Multi-threaded software framework development for the ATLAS experiment
por: Stewart, Graeme, et al.
Publicado: (2016)

Multi-threaded Software Framework Development for the ATLAS Experiment
por: Stewart, Graeme, et al.
Publicado: (2016)

Intel threading building blocks: outfitting C++ for multi-vore processor parallelism
por: Reinders, James
Publicado: (2007)

AthenaMT: Upgrading the ATLAS Software Framework for the Many-Core World with Multi-Threading
por: Leggett, Charles, et al.
Publicado: (2016)

AthenaMT: upgrading the ATLAS software framework for the many-core world with multi-threading
por: Leggett, Charles, et al.
Publicado: (2017)

Intel Quad Core Processor
Publicado: (2017)

Does the Intel Xeon Phi processor fit HEP workloads?
por: Nowak, Andrzej, et al.
Publicado: (2014)

Evaluation of the Intel Westmere-EP server processor
por: Jarp, S, et al.
Publicado: (2010)

Evaluation of the Intel Nehalem-EX server processor
por: Jarp, S, et al.
Publicado: (2010)

Evaluation of the Intel Westmere-EX server processor
por: Jarp, S, et al.
Publicado: (2011)

ATLAS in-file metadata and multi-threaded processing
por: Berghaus, Frank, et al.
Publicado: (2021)

ATLAS in-file metadata and multi-threaded processing
por: Berghaus, Frank, et al.
Publicado: (2021)

New compilers speed up applications for Intel-based systems; Intel Compilers pave the way for Intel's Hyper-threading technology
Publicado: (2002)

Optimizing Applications for Multi-Core Processors: Using the Intel Integrated Performance Primitives
por: Taylor, Stewart
Publicado: (2007)

Evaluation of the Intel Sandy Bridge-EP server processor
por: Jarp, S, et al.
Publicado: (2012)

Intel Core 2 Duo Processor E6600
Publicado: (2017)

Cost-efficiency of Large-scale Electronic Structure Simulations with Intel Xeon Phi Processors
por: Ryu, Hoon
Publicado: (2019)

Running ATLAS workloads within massively parallel distributed applications using Athena Multi-Process framework (AthenaMP)
por: Calafiura, Paolo, et al.
Publicado: (2015)

Running ATLAS workloads within massively parallel distributed applications using Athena Multi-Process framework (AthenaMP)
por: Calafiura, Paolo, et al.
Publicado: (2015)

Multi-Threaded Algorithms for General purpose Graphics Processor Units in the ATLAS High Level Trigger
por: Conde Mui\~no, Patricia
Publicado: (2016)

Managing Asynchronous Data in ATLAS's Concurrent Framework
por: Baines, John, et al.
Publicado: (2016)

Managing Asynchronous Data in ATLAS's Concurrent Framework
por: Leggett, Charles, et al.
Publicado: (2016)

Parallelizing and Optimizing LHCb-Kalman for Intel Xeon Phi KNL Processors
por: Fernández, Plácido, et al.
Publicado: (2018)

CMSSW Performance Monitoring on processors based on the Intel Core and Nehalem Microarchitectures
por: Kruse, Daniele Francesco
Publicado: (2011)

Understanding HPC Benchmark Performance on Intel Broadwell and Cascade Lake Processors
por: Alappat, Christie L., et al.
Publicado: (2020)

Raythena: a vertically integrated scheduler for ATLAS applications on heterogeneous distributed resources
por: Muskinja, Miha, et al.
Publicado: (2019)

Mastering Assembly programming: from instruction set to kernel module with Intel processor
por: Lyashko, Alexey
Publicado: (2017)

Evaluating HPX as a Next-Gen Scheduler for ATLAS on HPCs
por: Stanislaus, Beojan, et al.
Publicado: (2022)

Scaling read aligners to hundreds of threads on general-purpose processors
por: Langmead, Ben, et al.
Publicado: (2019)

Towards a distributed heterogeneous task scheduler for the ATLAS offline software framework
por: Esseiva, Julien, et al.
Publicado: (2023)

Towards a distributed heterogeneous task scheduler for the ATLAS offline software framework
por: Esseiva, Julien, et al.
Publicado: (2023)

Secure processors part I: background, taxonomy for secure enclaves and Intel SGX architecture
por: Costan, Victor, et al.
Publicado: (2017)

Secure processors part II: Intel SGX security analysis and MIT Sanctum architecture
por: Costan, Victor, et al.
Publicado: (2017)

John Knight
Publicado: (1912)

The Nameless Knight
Publicado: (1886)

Experience with low-power x86 processors (Atom) for HEP usage. An initial analysis of the Intel® dual core Atom™ N330 processor
por: Balazs, G, et al.
Publicado: (2009)

64k networked multi-threaded processors and their real-time application in high energy physics
por: Schneider, R, et al.
Publicado: (2002)

Cannot write session to /tmp/vufind_sessions/sess_no4g96oprolburteksibj2oaob