Electronics Design and System Integration of the ATLAS New Small Wheels

The upgrades of the LHC accelerator and the experiments in 2019/20 and 2023/24 will allow to in-crease the luminosity to 2×1034 cm−2s−1 and 5-7×1034 cm−2s−1, respectively. For the HL-LHC phase, the expected mean number of interactions per bunch crossing will be 55 at 2×1034 cm−2s−1 and ~140 at 5×1034 cm−2s−1. This increase drastically impacts the ATLAS trigger and trigger rates. For the ATLAS Muon Spectrometer, a replacement of the innermost endcap stations, the so-called “Small Wheels” operating in a magnetic field, is therefore planned for 2019/20 to be able to maintain a low pT threshold for single muon and excellent tracking capability in the HL-LHC regime. The New Small Wheels will feature two new detector technologies: Resistive Micromegas and small strip Thin Gap Chambers comprising a system of ~2.4 million readout channels. Both detector technologies will provide trigger and tracking primitives fully compliant with the post-2024 HL-LHC operation. To al-low for some safety margin, the design studies assume a maximum instantaneous luminosity of 7×1034 cm−2 s−1, 200 pile-up events, trigger rates of 1 MHz at Level-0 and 400 KHz at Level-1. A radia-tion dose of ~1700 Gy (inner radius) is expected. The electronics design of such a system will be implemented in some 8000 on-detector boards including the design of four different custom ASICs. Among them the 64-channel VMM, a common frontend mixed-signal ASIC for both detector tech-nologies and charge-interpolating trackers, provides amplitude and timing measurements, direct output of trigger primitives and Level-0 trigger buffering. The candidate selection is required to be within a budget latency of 1 us, and 6 us after 2024. Moreover, the design integrates the GBTx (a radiation hard 5 Gigabit transceiver) and a Slow Control ASICs developed at CERN. The custom GBTx data flow links are aggregated onto an industry standard high speed network to which standard PCs perform data acquisition, configuration, and monitoring. The large number of readout channels, high speed output data rate, harsh radiation and magnetic environment, small available space, poor access and low power consumption all impose great challenges on the system design. The overall design and first results from integration of the electronics in a vertical slice test will be presented.