An IMPI-compliant control system for the ATLAS TileCal Phase II Upgrade PreProcessor module

TileCal is the Tile hadronic calorimeter of the ATLAS experiment at the LHC. The LHC upgrade program, currently under development, will culminate in the High Luminosity LHC (HL-LHC), which is expected to increase about five times the LHC nominal instantaneous luminosity. The readout electronics of the Tile calorimenter being redesigned introducing a new read-out strategy in order to accommodate the detector to the new HL-LHC parameters. The data generated inside the detector at every bunch crossing will be transmitted to the PreProcessor (PPR) boards before any event selection is applied. The PPRs will be located at off-detector sites. The PPR will be responsible of providing preprocessed trigger information to the ATLAS first level of trigger (L1). In overall it will represent the interface between the data acquisition, trigger and control systems and the on-detector electronics. The PPR, being an important part of the readout system, needs to be remotely accessed and monitored to prevent failures or, in case some failure occurs, to accurately diagnose the problem. With that purpose in mind, the PPR is included in an ATCA shelf that, not only provides high-speed communication capabilities, but also includes an IPMI-compliant out-of-band control architecture. A Module Management Controller (MMC) is part of the PPR hardware, in this way, the PPR can be remotely accessed to read the state and value of the sensors, to be rebooted in case of firmware failure or the be evaluated even before the FPGAs have been booted.