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Software and Firmware co-development using High-level Synthesis
Accelerating trigger applications on FPGAs (using VHDL/Verilog) at the CMS experiment at CERN's Large Hadron Collider at CERN warrants consistency between each trigger firmware and its corresponding C++ model. This tedious and time consuming process of convergence is exacerbated during each upg...
Autor principal: | Pratap Ghanathe, Nikhil |
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Lenguaje: | eng |
Publicado: |
2016
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1088/1748-0221/12/01/C01083 http://cds.cern.ch/record/2233159 |
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