Studies of irradiated AMS H35 CMOS detectors for the ATLAS tracker upgrade

Silicon detectors based on the HV-CMOS technology are being investigated as possible candidate for the outer layers of the ATLAS pixel detector for the High Luminosity LHC. In this framework the H35Demo ASIC has been produced in the 350 nm AMS technology (H35). The H35Demo chip has a large area (18....

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Detalles Bibliográficos
Autores principales: Cavallaro, Emanuele, Casanova, Raimon, Förster, Fabian, Grinstein, Sebastian, Lange, Jörn, Kramberger, Gregor, Mandić, Igor, Puigdengoles, Carles, Terzo, Stefano
Formato: info:eu-repo/semantics/article
Lenguaje:eng
Publicado: JINST 2016
Materias:
hep-ex
6: Novel high voltage and resistive CMOS sensors
physics.ins-det
Detectors and Experimental Techniques
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/12/01/C01074
http://cds.cern.ch/record/2233399
Descripción
Sumario:Silicon detectors based on the HV-CMOS technology are being investigated as possible candidate for the outer layers of the ATLAS pixel detector for the High Luminosity LHC. In this framework the H35Demo ASIC has been produced in the 350 nm AMS technology (H35). The H35Demo chip has a large area (18.49 × 24.40 mm(2)) and includes four different pixel matrices and three test structures. In this paper the radiation hardness properties, in particular the evolution of the depletion region with fluence is studied using edge-TCT on test structures. Measurements on the test structures from chips with different substrate resistivity are shown for non irradiated and irradiated devices up to a cumulative fluence of 2 ⋅ 10(15) 1 MeV n(eq) / cm(2).

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