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Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme

The Level-1 Data Driver Card (L1DDC) will be designed for the needs of the future upgrades of the innermost stations of the ATLAS end-cap muon spectrometer. The L1DDC is a high speed aggregator board capable of communicating with a large number of front-end electronics. It co...

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Detalles Bibliográficos
Autores principales: Gkountoumis, Panagiotis, Alexopoulos, T
Lenguaje:eng
Publicado: 2016
Materias:
Acceso en línea:http://cds.cern.ch/record/2235344
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author Gkountoumis, Panagiotis
Alexopoulos, T
author_facet Gkountoumis, Panagiotis
Alexopoulos, T
author_sort Gkountoumis, Panagiotis
collection CERN
description The Level-1 Data Driver Card (L1DDC) will be designed for the needs of the future upgrades of the innermost stations of the ATLAS end-cap muon spectrometer. The L1DDC is a high speed aggregator board capable of communicating with a large number of front-end electronics. It collects the Level-1 data along with monitoring data and transmits them to a network interface through a single bidirectional fiber link. In addition, the L1DDC board distributes trigger, time and configuration data coming from the network interface to the front-end boards. The L1DDC is fully compatible with the Phase II upgrade where the trigger rate is expected to reach 1 MHz. This paper describes the overall scheme of the data acquisition process and especially the three different L1DDC boards that will be fabricated. Moreover the L1DDC prototype-1 is also described.
id cern-2235344
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2016
record_format invenio
spelling cern-22353442019-09-30T06:29:59Zhttp://cds.cern.ch/record/2235344engGkountoumis, PanagiotisAlexopoulos, TLevel-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout schemeParticle Physics - ExperimentThe Level-1 Data Driver Card (L1DDC) will be designed for the needs of the future upgrades of the innermost stations of the ATLAS end-cap muon spectrometer. The L1DDC is a high speed aggregator board capable of communicating with a large number of front-end electronics. It collects the Level-1 data along with monitoring data and transmits them to a network interface through a single bidirectional fiber link. In addition, the L1DDC board distributes trigger, time and configuration data coming from the network interface to the front-end boards. The L1DDC is fully compatible with the Phase II upgrade where the trigger rate is expected to reach 1 MHz. This paper describes the overall scheme of the data acquisition process and especially the three different L1DDC boards that will be fabricated. Moreover the L1DDC prototype-1 is also described.ATL-MUON-PROC-2016-010oai:cds.cern.ch:22353442016-11-25
spellingShingle Particle Physics - Experiment
Gkountoumis, Panagiotis
Alexopoulos, T
Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title_full Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title_fullStr Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title_full_unstemmed Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title_short Level-1 Data Driver Card of the ATLAS New Small Wheel upgrade compatible with the Phase II 1 MHz readout scheme
title_sort level-1 data driver card of the atlas new small wheel upgrade compatible with the phase ii 1 mhz readout scheme
topic Particle Physics - Experiment
url http://cds.cern.ch/record/2235344
work_keys_str_mv AT gkountoumispanagiotis level1datadrivercardoftheatlasnewsmallwheelupgradecompatiblewiththephaseii1mhzreadoutscheme
AT alexopoulost level1datadrivercardoftheatlasnewsmallwheelupgradecompatiblewiththephaseii1mhzreadoutscheme