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Fuzzy logic based power-efficient real-time multi-core system

This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Syste...

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Detalles Bibliográficos
Autores principales: Ahmed, Jameel, Siyal, Mohammed Yakoob, Najam, Shaheryar, Najam, Zohaib
Lenguaje:eng
Publicado: Springer 2017
Materias:
Acceso en línea:https://dx.doi.org/10.1007/978-981-10-3120-5
http://cds.cern.ch/record/2240569
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author Ahmed, Jameel
Siyal, Mohammed Yakoob
Najam, Shaheryar
Najam, Zohaib
author_facet Ahmed, Jameel
Siyal, Mohammed Yakoob
Najam, Shaheryar
Najam, Zohaib
author_sort Ahmed, Jameel
collection CERN
description This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors. .
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institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
publisher Springer
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spelling cern-22405692021-04-21T19:23:39Zdoi:10.1007/978-981-10-3120-5http://cds.cern.ch/record/2240569engAhmed, JameelSiyal, Mohammed YakoobNajam, ShaheryarNajam, ZohaibFuzzy logic based power-efficient real-time multi-core systemEngineeringThis book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors. .Springeroai:cds.cern.ch:22405692017
spellingShingle Engineering
Ahmed, Jameel
Siyal, Mohammed Yakoob
Najam, Shaheryar
Najam, Zohaib
Fuzzy logic based power-efficient real-time multi-core system
title Fuzzy logic based power-efficient real-time multi-core system
title_full Fuzzy logic based power-efficient real-time multi-core system
title_fullStr Fuzzy logic based power-efficient real-time multi-core system
title_full_unstemmed Fuzzy logic based power-efficient real-time multi-core system
title_short Fuzzy logic based power-efficient real-time multi-core system
title_sort fuzzy logic based power-efficient real-time multi-core system
topic Engineering
url https://dx.doi.org/10.1007/978-981-10-3120-5
http://cds.cern.ch/record/2240569
work_keys_str_mv AT ahmedjameel fuzzylogicbasedpowerefficientrealtimemulticoresystem
AT siyalmohammedyakoob fuzzylogicbasedpowerefficientrealtimemulticoresystem
AT najamshaheryar fuzzylogicbasedpowerefficientrealtimemulticoresystem
AT najamzohaib fuzzylogicbasedpowerefficientrealtimemulticoresystem