Cargando…
Hardware security and trust: design and deployment of integrated circuits in a threatened environment
This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given ci...
Autores principales: | , , , |
---|---|
Lenguaje: | eng |
Publicado: |
Springer
2017
|
Materias: | |
Acceso en línea: | https://dx.doi.org/10.1007/978-3-319-44318-8 http://cds.cern.ch/record/2243787 |
_version_ | 1780953326254292992 |
---|---|
author | Sklavos, Nicolas Chaves, Ricardo Natale, Giorgio Regazzoni, Francesco |
author_facet | Sklavos, Nicolas Chaves, Ricardo Natale, Giorgio Regazzoni, Francesco |
author_sort | Sklavos, Nicolas |
collection | CERN |
description | This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks. |
id | cern-2243787 |
institution | Organización Europea para la Investigación Nuclear |
language | eng |
publishDate | 2017 |
publisher | Springer |
record_format | invenio |
spelling | cern-22437872021-04-21T19:21:44Zdoi:10.1007/978-3-319-44318-8http://cds.cern.ch/record/2243787engSklavos, NicolasChaves, RicardoNatale, GiorgioRegazzoni, FrancescoHardware security and trust: design and deployment of integrated circuits in a threatened environmentEngineeringThis book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.Springeroai:cds.cern.ch:22437872017 |
spellingShingle | Engineering Sklavos, Nicolas Chaves, Ricardo Natale, Giorgio Regazzoni, Francesco Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title | Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title_full | Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title_fullStr | Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title_full_unstemmed | Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title_short | Hardware security and trust: design and deployment of integrated circuits in a threatened environment |
title_sort | hardware security and trust: design and deployment of integrated circuits in a threatened environment |
topic | Engineering |
url | https://dx.doi.org/10.1007/978-3-319-44318-8 http://cds.cern.ch/record/2243787 |
work_keys_str_mv | AT sklavosnicolas hardwaresecurityandtrustdesignanddeploymentofintegratedcircuitsinathreatenedenvironment AT chavesricardo hardwaresecurityandtrustdesignanddeploymentofintegratedcircuitsinathreatenedenvironment AT natalegiorgio hardwaresecurityandtrustdesignanddeploymentofintegratedcircuitsinathreatenedenvironment AT regazzonifrancesco hardwaresecurityandtrustdesignanddeploymentofintegratedcircuitsinathreatenedenvironment |