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Upgrade of the ATLAS hadronic Tile calorimeter for the High luminosity LHC

The Tile Calorimeter (TileCal) is the hadronic calorimeter covering the central region of the ATLAS detector at the LHC. It is a sampling calorimeter consisting of alternating thin steel plates and scintillating tiles. Wavelength shifting fibers coupled to the tiles collect the produced light and ar...

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Detalles Bibliográficos
Autor principal: Asensi Tortajada, Ignacio
Lenguaje:eng
Publicado: 2017
Materias:
Acceso en línea:http://cds.cern.ch/record/2271566
Descripción
Sumario:The Tile Calorimeter (TileCal) is the hadronic calorimeter covering the central region of the ATLAS detector at the LHC. It is a sampling calorimeter consisting of alternating thin steel plates and scintillating tiles. Wavelength shifting fibers coupled to the tiles collect the produced light and are read out by photomultiplier tubes. An analog sum of the processed signal of several photomultipliers serves as input to the first level of trigger. Photomultiplier signals are then digitized at 40 MHz and stored on detector and are only transferred off detector once the first level trigger acceptance has been confirmed (at a rate of maximum 100 kHz). The Large Hadron Collider (LHC) has envisaged a series of upgrades towards a High Luminosity LHC (HL-LHC) delivering five times the LHC nominal instantaneous luminosity. The ATLAS Phase II upgrade, in 2024, will accommodate the upgrade of the detector and data acquisition system for the HL-LHC. In particular, TileCal will undergo a major replacement of its on- and off-detector electronics. In the new architecture, all signals will be digitized and then transferred directly to the off-detector electronics, where the signals will be reconstructed, stored, and sent to the first level of trigger at the rate of 40 MHz. This will provide better precision of the calorimeter signals used by the trigger system and will allow the development of more complex trigger algorithms. Changes to the electronics will also contribute to the reliability and redundancy of the system. Three different front-end options are presently being investigated for the upgrade, two of them based on ASICs, and a final solution will be chosen after extensive laboratory and test beam studies that are in progress. A hybrid demonstrator module is being developed using the new electronics while conserving compatibility with the current system. The status of the developments will be presented, including results from the several tests with particle beams.