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Analysis and simulation of HV-CMOS assemblies for the CLIC vertex detector
One of the design concepts currently under study for the vertex detector at the proposed Compact Linear Collider is a High-Voltage CMOS sensor, fabricated in a commercial 180 nm technology, capacitively coupled to a hybrid readout chip. Tests of the assemblies were carried out at the CERN SPS using...
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| Lenguaje: | eng |
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2018
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| Acceso en línea: | https://dx.doi.org/10.1007/978-981-13-1316-5_77 http://cds.cern.ch/record/2272217 |