FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector

CERN has planned a series of upgrades for the LHC. The last in this current series of planned upgrades is designated the HL-LHC. At the same time, the ATLAS Experiment will be extensively changed to meet the challenges of this upgrade (termed as the “Phase-II” upgrade). The Inner Detector will be co...

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Autores principales: Yadav, Amitabh, Solans Sanchez, Carlos, Sharma, Abhishek
Lenguaje:eng
Publicado: 2017
Materias:
Computing and Computers
Engineering
Acceso en línea:http://cds.cern.ch/record/2278364
_version_ 1780955371931697152
author Yadav, Amitabh
Solans Sanchez, Carlos
Sharma, Abhishek
author_facet Yadav, Amitabh
Solans Sanchez, Carlos
Sharma, Abhishek
author_sort Yadav, Amitabh
collection CERN
description CERN has planned a series of upgrades for the LHC. The last in this current series of planned upgrades is designated the HL-LHC. At the same time, the ATLAS Experiment will be extensively changed to meet the challenges of this upgrade (termed as the “Phase-II” upgrade). The Inner Detector will be completely rebuilt for the phase-II. The TRT, SCT and Pixel will be replaced by the all-silicon tracker, termed as the Inner Tracker (ITk). The read-out of this future ITk detector is an engineering challenge for the routing of services and quality of the data. This document describes the FPGA firmware development that integrates the GBT, Elink and Rx-Tx Cores for communication between the FE-I4 modules and the FELIX read-out system.
id cern-2278364
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 2017
record_format invenio
spelling cern-22783642019-09-30T06:29:59Zhttp://cds.cern.ch/record/2278364engYadav, AmitabhSolans Sanchez, CarlosSharma, AbhishekFE-I4 Firmware Development and Integration with FELIX for the Pixel DetectorComputing and ComputersEngineeringCERN has planned a series of upgrades for the LHC. The last in this current series of planned upgrades is designated the HL-LHC. At the same time, the ATLAS Experiment will be extensively changed to meet the challenges of this upgrade (termed as the “Phase-II” upgrade). The Inner Detector will be completely rebuilt for the phase-II. The TRT, SCT and Pixel will be replaced by the all-silicon tracker, termed as the Inner Tracker (ITk). The read-out of this future ITk detector is an engineering challenge for the routing of services and quality of the data. This document describes the FPGA firmware development that integrates the GBT, Elink and Rx-Tx Cores for communication between the FE-I4 modules and the FELIX read-out system.CERN-STUDENTS-Note-2017-047oai:cds.cern.ch:22783642017-08-11
spellingShingle Computing and Computers
Engineering
Yadav, Amitabh
Solans Sanchez, Carlos
Sharma, Abhishek
FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title_full FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title_fullStr FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title_full_unstemmed FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title_short FE-I4 Firmware Development and Integration with FELIX for the Pixel Detector
title_sort fe-i4 firmware development and integration with felix for the pixel detector
topic Computing and Computers
Engineering
url http://cds.cern.ch/record/2278364
work_keys_str_mv AT yadavamitabh fei4firmwaredevelopmentandintegrationwithfelixforthepixeldetector
AT solanssanchezcarlos fei4firmwaredevelopmentandintegrationwithfelixforthepixeldetector
AT sharmaabhishek fei4firmwaredevelopmentandintegrationwithfelixforthepixeldetector

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