Upgrade of the ATLAS Monitored Drift Tube Frontend Electronics for the HL-LHC

The ATLAS monitored drift tube (MDT) chambers are the main component of the precision tracking system in the ATLAS muon spectrometer. The MDT system is capable of measuring the sagitta of muon tracks to an accuracy of 60 μm, which corresponds to a momentum accuracy of about 10% at pT=1 TeV. To cope with large amount of data and high event rate expected from the High-Luminosity LHC (HL-LHC) upgrade, ATLAS plans to use the MDT detector at the first-trigger level to improve the muon transverse momentum resolution and reduce the trigger rate. The new MDT trigger and readout system will have an output event rate of 1 MHz and a latency of 6 us at the first-level trigger. The signals from MDT tubes are first processed by an Amplifier/Shaper/Discriminator (ASD) ASIC, and the binary differential signals output by the ASDs are then router to the Time-to-Digital Converter (TDC) ASIC, where the arrival times of leading and trailing edges are digitized in a time bin of 0.78 ns which leads to an RMS timing error of 0.25 ns. The pulse height is encoded as the time interval between the leading and trailing edges of the ASD output pulse. A local processor, Chamber Service Module (CSM), routes all hit signals from up to 432 tubes through optical fibers to the trigger processors located in the ATLAS movable counting house. The trigger processor will extract MDT tube hits corresponding to the right bunch crossing ID, perform segment-finding and track fitting algorithms on these selected hits and determine the muon transverse momentum at the first-level trigger. A system based on Front End Link Interface eXchange (FELIX) will be used to provide time, trigger and control signals and also for readout. Detailed simulation have been performed for the whole trigger data flow chain to make sure it satisfy the first-level trigger latency requirement. First prototypes for ASD, TDC and CSM have been designed and tested. Integration tests with various prototypes have been performed with test beams at CERN. We will present latest results for these prototype ASICs and boards.