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Design technology co-optimization in the era of sub-resolution IC scaling

Detalles Bibliográficos
Autores principales: Vaidyanathan, Kaushik, Pileggi, Lawrence
Lenguaje:eng
Publicado: Society of Photo-Optical Instrumentation Engineers 1984
Materias:
Acceso en línea:http://cds.cern.ch/record/2288907
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author Vaidyanathan, Kaushik
Vaidyanathan, Kaushik
Pileggi, Lawrence
author_facet Vaidyanathan, Kaushik
Vaidyanathan, Kaushik
Pileggi, Lawrence
author_sort Vaidyanathan, Kaushik
collection CERN
id cern-2288907
institution Organización Europea para la Investigación Nuclear
language eng
publishDate 1984
publisher Society of Photo-Optical Instrumentation Engineers
record_format invenio
spelling cern-22889072021-04-21T19:02:03Zhttp://cds.cern.ch/record/2288907engVaidyanathan, KaushikVaidyanathan, KaushikPileggi, LawrenceDesign technology co-optimization in the era of sub-resolution IC scalingEngineeringSociety of Photo-Optical Instrumentation Engineersoai:cds.cern.ch:22889071984
spellingShingle Engineering
Vaidyanathan, Kaushik
Vaidyanathan, Kaushik
Pileggi, Lawrence
Design technology co-optimization in the era of sub-resolution IC scaling
title Design technology co-optimization in the era of sub-resolution IC scaling
title_full Design technology co-optimization in the era of sub-resolution IC scaling
title_fullStr Design technology co-optimization in the era of sub-resolution IC scaling
title_full_unstemmed Design technology co-optimization in the era of sub-resolution IC scaling
title_short Design technology co-optimization in the era of sub-resolution IC scaling
title_sort design technology co-optimization in the era of sub-resolution ic scaling
topic Engineering
url http://cds.cern.ch/record/2288907
work_keys_str_mv AT vaidyanathankaushik designtechnologycooptimizationintheeraofsubresolutionicscaling
AT vaidyanathankaushik designtechnologycooptimizationintheeraofsubresolutionicscaling
AT pileggilawrence designtechnologycooptimizationintheeraofsubresolutionicscaling