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The ARAGORN front-end—An FPGA based implementation of a Time-to-Digital Converter

We present the ARAGORN front-end, a cost-optimized, high-density Time-to-Digital Converter platform. Four Xilinx Artix-7 FPGAs implement 384 channels with an average time resolution of 165 ps on a single module. A fifth FPGA acts as data concentrator and generic board master. The front-end features...

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Detalles Bibliográficos
Autores principales: Büchele, M., Fischer, H., Herrmann, F., Schaffer, C.
Lenguaje:eng
Publicado: 2017
Materias:
Acceso en línea:https://dx.doi.org/10.1088/1748-0221/12/02/C02006
http://cds.cern.ch/record/2291337
Descripción
Sumario:We present the ARAGORN front-end, a cost-optimized, high-density Time-to-Digital Converter platform. Four Xilinx Artix-7 FPGAs implement 384 channels with an average time resolution of 165 ps on a single module. A fifth FPGA acts as data concentrator and generic board master. The front-end features a SFP+ transceiver for data output and an optional multi-channel optical transceiver slot to interconnect with up to seven boards though a star topology. This novel approach makes it possible to read out up to eight boards yielding 3072 input channels via a single optical fiber at a bandwidth of 6.6 Gb/s.