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Commissioning and Validation of the ATLAS Level-1 Topological Trigger in Run 2
The ATLAS experiment has introduced and recently commissioned a completely new hardware sub-system of its first-level trigger: the topological processor (L1Topo). L1Topo consist of two AdvancedTCA blades mounting state-of-the-art FPGA processors, providing high input bandwidth (up to 4 Gb/s) and low...
Autores principales: | Zheng, Daniel, Hong, Tae Min, Aukerman, Andrew Todd |
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Lenguaje: | eng |
Publicado: |
2017
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Materias: | |
Acceso en línea: | https://dx.doi.org/10.1142/9789811207402_0048 http://cds.cern.ch/record/2294215 |
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