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Characterization and Verification Environment for the RD53A Pixel Readout Chip in 65 nm CMOS
The RD53 collaboration is currently designing a large scale prototype pixel readout chip in 65 nm CMOS technology for the phase 2 upgrades at the HL-LHC. The RD53A chip will be available by the end of the year 2017 and will be extensively tested to confirm if the circuit and the architecture make a...
| Autores principales: | , , , , , |
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| Lenguaje: | eng |
| Publicado: |
SISSA
2017
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| Materias: | |
| Acceso en línea: | https://dx.doi.org/10.22323/1.313.0084 http://cds.cern.ch/record/2296682 |